97 lines
3.5 KiB
C
97 lines
3.5 KiB
C
/* ADC1.c
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* Students put your names here
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* Modified: put the date here
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* 12-bit ADC input on ADC1 channel 5, PB18
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*/
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#include <ti/devices/msp/msp.h>
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#include "../inc/Clock.h"
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#define ADCVREF_VDDA 0x000
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#define ADCVREF_INT 0x200
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void ADC1_Init(uint32_t channel){
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// Reset ADC and VREF
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// RSTCLR
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// bits 31-24 unlock key 0xB1
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// bit 1 is Clear reset sticky bit
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// bit 0 is reset ADC
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ADC1->ULLMEM.GPRCM.RSTCTL = (uint32_t)0xB1000003;
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// Enable power ADC and VREF
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// PWREN
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// bits 31-24 unlock key 0x26
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// bit 0 is Enable Power
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ADC1->ULLMEM.GPRCM.PWREN = (uint32_t)0x26000001;
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Clock_Delay(24); // time for ADC and VREF to power up
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ADC1->ULLMEM.GPRCM.CLKCFG = 0xA9000000; // ULPCLK
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// bits 31-24 key=0xA9
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// bit 5 CCONSTOP= 0 not continuous clock in stop mode
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// bit 4 CCORUN= 0 not continuous clock in run mode
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// bit 1-0 0=ULPCLK,1=SYSOSC,2=HFCLK
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ADC1->ULLMEM.CLKFREQ = 7; // 40 to 48 MHz
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ADC1->ULLMEM.CTL0 = 0x03010000;
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// bits 26-24 = 011 divide by 8
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// bit 16 PWRDN=1 for manual, =0 power down on completion, if no pending trigger
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// bit 0 ENC=0 disable (1 to 0 will end conversion)
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ADC1->ULLMEM.CTL1 = 0x00000000;
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// bits 30-28 =0 no shift
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// bits 26-24 =0 no averaging
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// bit 20 SAMPMODE=0 high phase
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// bits 17-16 CONSEQ=0 ADC at start will be sampled once, 10 for repeated sampling
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// bit 8 SC=0 for stop, =1 to software start
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// bit 0 TRIGSRC=0 software trigger
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ADC1->ULLMEM.CTL2 = 0x00000000;
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// bits 28-24 ENDADD (which MEMCTL to end)
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// bits 20-16 STARTADD (which MEMCTL to start)
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// bits 15-11 SAMPCNT (for DMA)
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// bit 10 FIFOEN=0 disable FIFO
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// bit 8 DMAEN=0 disable DMA
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// bits 2-1 RES=0 for 12 bit (=1 for 10bit,=2for 8-bit)
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// bit 0 DF=0 unsigned formant (1 for signed, left aligned)
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ADC1->ULLMEM.MEMCTL[0] = ADCVREF_VDDA+channel;
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// bit 28 WINCOMP=0 disable window comparator
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// bit 24 TRIG trigger policy, =0 for auto next, =1 for next requires trigger
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// bit 20 BCSEN=0 disable burn out current
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// bit 16 = AVGEN =0 for no averaging
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// bit 12 = STIME=0 for SCOMP0
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// bits 9-8 VRSEL = 10 for internal VREF,(00 for VDDA)
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// bits 4-0 channel = 0 to 7 available
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ADC1->ULLMEM.SCOMP0 = 0; // 8 sample clocks
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// ADC1->ULLMEM.GEN_EVENT.ICLR |= 0x0100; // clear flag MEMCTL[0]
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ADC1->ULLMEM.GEN_EVENT.IMASK = 0; // no interrupt
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}
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void ADCinit(void){
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// write code to initialize ADC1 channel 5, PB18
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// Your measurement will be connected to PB18
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// 12-bit mode, 0 to 3.3V, right justified
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// software trigger, no averaging
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ADC1_Init(5);
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}
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uint32_t ADCin(void){
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// write code to sample ADC1 channel 5, PB18 once
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// return digital result (0 to 4095)
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ADC1->ULLMEM.CTL0 |= 0x00000001; // enable conversions
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ADC1->ULLMEM.CTL1 |= 0x00000100; // start ADC
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uint32_t volatile delay=ADC1->ULLMEM.STATUS; // time to let ADC start
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while((ADC1->ULLMEM.STATUS&0x01)==0x01){}; // wait for completion
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return ADC1->ULLMEM.MEMRES[0];
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// return 42;
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}
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// your function to convert ADC sample to distance (0.001cm)
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// use main2 to calibrate the system fill in 5 points in Calibration.xls
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// determine constants k1 k2 to fit Position=(k1*Data + k2)>>12
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uint32_t Convert(uint32_t input){
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return (input*2000)>>12;
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//return 42; // replace this with a linear function
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}
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// do not use this function
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// it is added just to show you how SLOW floating point in on a Cortex M0+
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float FloatConvert(uint32_t input){
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return 0.00048828125*input -0.0001812345;
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}
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