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pulipakaa24
2026-06-12 02:55:04 -07:00
commit 30406f4f49
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RTOS_Lab3_RTOSpriority/.ccsproject Normal file
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"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/inc/Clock.c"
},
{
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/DFT16.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/IRDistance.c"
},
{
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"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/Interpreter.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/LPF.c"
},
{
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},
{
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},
{
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{
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/RTOS_Lab3.c"
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{
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/RTOS_UART.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/RTOS_UARTints.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/SPI.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/SPI1.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/ST7735_SDC.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/TFLuna2.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/TFLunaCommon.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
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},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug/syscfg\"",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Labs_common/osasm.s"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOS_Lab3_RTOSpriority/ticlang/startup_mspm0g3507_ticlang.c"
}
]

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<p style="text-align: center;" align="center"><span
style="font-size: 18pt;">RTOS_Lab3_RTOSpriority</span><br>
<table class="MsoNormalTable"
style="border: 3pt outset ; background: rgb(255, 204, 153) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; width: 100%;"
border="1" cellpadding="0" width="100%">
<tr>
<td>
<p><b><span style="font-size: 18pt;">Readme</b></span>
<br> &nbsp;<br>
This is the starter project for ECE445M Lab 3. For more information
see <a href="https://users.ece.utexas.edu/~valvano/EE445M/" target="_blank">ECE445M class web page</a> <br>&nbsp;<br>
</td>
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border="1" cellpadding="0" width="100%">
<tbody>
<tr>
<td>
<p><b><span style="font-size: 18pt;">Hardware Required</b></span>
<br>
<ul>
<li>MSPM0G3507 LaunchPad&trade; Development Kit (LP-MSPM0G3507)</li>
<li>ECE445M Sensor board</li>
<li>One TFLuna</li>
<li>One robot bump switch</li>
<li>One analog distance sensor GP2Y0A41SK0F or GP2Y0A21YK0F</li>
</ul>
<p class="PictureWide"><span lang="en-US"><img src="../RTOS_Labs_common/SensorBoard.png" width="500"
></span></p>
<p class="PictureWide"><span lang="en-US"><img src="../RTOS_Labs_common/RobotSensors.png" width="500"
></span></p>
<b><span style="font-size: 18pt;">Pin assignments</b></span>
<br>
<ul>
<li>Serial TxD: PA10 is UART0 Tx (MSPM0 to PC), used for intepreter</li>
<li>Serial RxD: PA11 is UART0 Rx (PC to MSPM0), used for intepreter</li>
<li>SPI1: PB7, MISO from ST7735 to SPI1 POCI </li>
<li>SPI1: PB9, SCK from SPI1 to ST7735 SCLK</li>
<li>SPI1: PB8, MOSI from SPI1 to ST7735 PICO</li>
<li>GPIO Output: PB6, from MSPM0 to ST7735 TFT_CS </li>
<li>GPIO Output: PB0, from MSPM0 to ST7735 CARD_CS </li>
<li>GPIO Output: PB16, from MSPM0 to ST7735 Data/Command </li>
<li>GPIO Output: PB15, from MSPM0 to ST7735 RESET </li>
<li>GPIO Output: PA8, used for profiling user code</li>
<li>GPIO Output: PA9, used for profiling user code</li>
<li>GPIO Output: PA16, used for profiling user code</li>
<li>GPIO Output: PB4, used for profiling user code</li>
<li>GPIO Output: PB1, used for profiling user code</li>
<li>GPIO Output: PB20, used for profiling user code</li>
<li>GPIO Output: PA0 is red LED1, could be used for debugging</li>
<li>GPIO Output: PB22 is BLUE LED2, used for debugging OS</li>
<li>GPIO Output: PB26 is RED LED2, used for debugging OS</li>
<li>GPIO Output: PB27 is GREEN LED2, used for debugging OS</li>
<li>GPIO Input: PB21 is S2 negative logic switch, used for aperiodic task</li>
<li>GPIO Input: PA28 is negative logic bump switch, used for aperiodic task</li>
<li>Analog Input: PA24 ADC0_3, IR analog distance sensor GP2Y0A41SK0F or GP2Y0A21YK0F</li>
<li>Serial TxD: PB17 is UART2 Tx (MSPM0 to TFLuna2), used in Labs 1,2,3,4</li>
<li>Serial RxD: PB18 is UART2 Rx (TFLuna2 to MSPM0), used in Labs 1,2,3,4</li>
</ul>
<b><span style="font-size: 18pt;">LaunchPad Jumpers</b></span>
<br>
<ul>
<li>Remove J16 J17 J18: Disconnects light sensor from the microcontroller PA22 PA27 PA26</li>
<li>J4: Connects PA0 to red LED</li>
<li>J21: Connects PA10 to XDS_UART</li>
<li>J22: Connects PA11 to XDS_UART</li>
<li>J14: SW1 to select PA9</li>
<li>J15: SW2 to select PA16</li>
<li>J16,J17,J18: remove to disconnect light sensor</li>
</ul>
</p> </td>
</tr>
</tbody>
</table>
</body>
</html>
<p>
Simplified BSD License (FreeBSD License)
Copyright &copy; 2026, Jonathan Valvano, All rights reserved.<br>
&nbsp;<br>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:<br>
<ol>
<li>Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.</li>
<li>Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.</li></ol>
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>
&nbsp;<br>
The views and conclusions contained in the software and documentation are
those of the authors and should not be interpreted as representing official
policies, either expressed or implied, of the FreeBSD Project.
<br> &nbsp;
</p>
<p>For more information, see <a href="http://users.ece.utexas.edu/~valvano/">
http://users.ece.utexas.edu/~valvano/</a>.
</p>
</div>
</body>
</html>

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/* SPI1.c
* Jonathan Valvano
* December 27, 2025
* Derived from uart_rw_multibyte_fifo_poll_LP_MSPM0G3507_nortos_ticlang
*/
// hardware connections, ECE445M RTOS sensor board
// **********Adafruit ST7735 TFT and SDC*******************
// ST7735
// Backlight (pin 10) to +3.3 V
// MISO (pin 9) to SPI1 POCI: PB7
// SCK (pin 8) to SPI1 SCLK: PB9
// MOSI (pin 7) to SPI1 PICO: PB8
// TFT_CS (pin 6) to GPIO: PB6
// CARD_CS (pin 5) to PB0 (GPIO)
// Data/Command (pin 4) to PB16 (GPIO), high for data, low for command
// RESET (pin 3) to PB15 (GPIO)
// VCC (pin 2) to +3.3 V
// Gnd (pin 1) to ground
// **********HiLetgo ST7735 TFT and SDC (SDC not tested)*******************
// ST7735
// LED- (pin 16) TFT, to ground
// LED+ (pin 15) TFT, to +3.3 V
// SD_CS (pin 14) SDC, to PB0 chip select
// MOSI (pin 13) SDC, to PB8 MOSI
// MISO (pin 12) SDC, to PB7 MISO
// SCK (pin 11) SDC, to serial clock
// CS (pin 10) TFT, to PB6 GPIO
// SCL (pin 9) TFT, to PB9 SPI1 SCLK
// SDA (pin 8) TFT, to PB8 MOSI SPI1 PICO
// A0 (pin 7) TFT, to PB16 Data/Command, high for data, low for command
// RESET (pin 6) TFT, to PB15 reset (GPIO), low to reset
// NC (pins 3,4,5)
// VCC (pin 2) to +3.3 V
// GND (pin 1) to ground
#include <ti/devices/msp/msp.h>
#include "../RTOS_Labs_common/SPI1.h"
#include "../inc/Clock.h"
#include "../inc/Timer.h"
#include "../inc/LaunchPad.h"
/*
// calls Clock_Freq to get bus clock
// initialize SPI for 8 MHz baud clock
// busy-wait synchronization
// SPI0,SPI1 in power domain PD1 SysClk equals bus CPU clock
void SPI_Init(void){uint32_t busfreq = Clock_Freq();
// assumes GPIOA and GPIOB are reset and powered previously
// RSTCLR to SPI1 peripherals
// bits 31-24 unlock key 0xB1
// bit 1 is Clear reset sticky bit
// bit 0 is reset gpio port
SPI1->GPRCM.RSTCTL = 0xB1000003;
// Enable power to SPI1 peripherals
// PWREN
// bits 31-24 unlock key 0x26
// bit 0 is Enable Power
SPI1->GPRCM.PWREN = 0x26000001;
// configure PB9 PB6 PB8 as alternate SPI1 function
IOMUX->SECCFG.PINCM[PB9INDEX] = 0x00000083; // SPI1 SCLK
IOMUX->SECCFG.PINCM[PB6INDEX] = 0x00000083; // SPI1 CS0
IOMUX->SECCFG.PINCM[PB8INDEX] = 0x00000083; // SPI1 PICO
IOMUX->SECCFG.PINCM[PB15INDEX] = 0x00000081; // GPIO output, LCD !RST
IOMUX->SECCFG.PINCM[PB16INDEX] = 0x00000081; // GPIO output, LCD RS
// ** IOMUX->SECCFG.PINCM[PA13INDEX] = 0x00000081; // GPIO output, LCD RS
Clock_Delay(24); // time for gpio to power up
// ** GPIOA->DOE31_0 |= 1<<13; // PA13 is LCD RS
GPIOB->DOE31_0 |= 1<<16; // PA13 is LCD RS
GPIOB->DOE31_0 |= 1<<15; // PB15 is LCD !RST
GPIOB->DOUTSET31_0 = 1<<16; // RS=1
// ** GPIOA->DOUTSET31_0 = 1<<13; // RS=1
GPIOB->DOUTSET31_0 = 1<<15; // !RST = 1
SPI1->CLKSEL = 8; // SYSCLK
// bit 3 SYSCLK
// bit 2 MFCLK
// bit 1 LFCLK
SPI1->CLKDIV = 0; // divide by 1
// bits 2-0 n (0 to 7), divide by n+1
//Set the bit rate clock divider to generate the serial output clock
// outputBitRate = (spiInputClock) / ((1 + SCR) * 2)
// 8,000,000 = (16,000,000)/((0 + 1) * 2)
// 8,000,000 = (32,000,000)/((1 + 1) * 2)
// 6,666,667 = (40,000,000)/((2 + 1) * 2)
// 10,000,000 = (40,000,000)/((1 + 1) * 2)
// 8,000,000 = (80,000,000)/((4 + 1) * 2)
// 8,000,000 = (Clock_Freq)/((m + 1) * 2)
// m = (Clock_Freq/16000000) - 1
if(busfreq <= 16000000){
SPI1->CLKCTL = 0; // frequency= busfreq/2
}else if(busfreq == 40000000){
SPI1->CLKCTL = 1; // frequency= 10MHz
// SPI1->CLKCTL = 2; // frequency= 6.66MHz
}else{
SPI1->CLKCTL = busfreq/16000000 -1; // 8 MHz
}
SPI1->CTL0 = 0x0027;
// bit 14 CSCLR=0 not cleared
// bits 13-12 CSSEL=0 CS0
// bit 9 SPH = 0
// bit 8 SPO = 0
// bits 6-5 FRF = 01 (4 wire)
// bits 4-0 n=7, data size is n+1 (8bit data)
SPI1->CTL1 = 0x0015;
// bits 29-24 RXTIMEOUT=0
// bits 23-16 REPEATX=0 disabled
// bits 15-12 CDMODE=0 manual
// bit 11 CDENABLE=0 CS3
// bit 7-5 =0 no parity
// bit 4=1 MSB first
// bit 3=0 POD (not used, not peripheral)
// bit 2=1 CP controller mode
// bit 1=0 LBM disable loop back
// bit 0=1 enable SPI
SPI_Reset();
}
//---------SPI_OutData------------
// Output 8-bit data to SPI port
// Input: data is an 8-bit data to be transferred
// Output: none
void SPI_OutData(char data){
while((SPI1->STAT&0x02) == 0x00){}; // spin if TxFifo full
GPIOA->DOUTSET31_0 = 1<<13; // RS=PA13=1 for data
SPI1->TXDATA = data;
}
//---------SPI_OutCommand------------
// Output 8-bit command to SPI port
// Input: data is an 8-bit data to be transferred
// Output: none
void SPI_OutCommand(char command){
while((SPI1->STAT&0x10) == 0x10){}; // spin if SPI busy
GPIOA->DOUTCLR31_0 = 1<<13; // RS=PA13=0 for command
SPI1->TXDATA = command;
while((SPI1->STAT&0x10) == 0x10){}; // spin if SPI busy
}
*/
//---------SPI1_Reset------------
// Reset LCD
// Input: none
// Output: none
// at 48 MHz
void SPI1_Reset(void){
// GPIOB->DOUTSET31_0 = 1<<15; // PB15=!RST=1
TFT_RST_HIGH();
Clock_Delay1ms(500); // 500ms (calibrated with logic analyzer)
//GPIOB->DOUTCLR31_0 = 1<<15; // PB15=!RST=0
TFT_RST_LOW();
Clock_Delay1ms(500); // 500ms
//GPIOB->DOUTSET31_0 = 1<<15; // PB15=!RST=1
TFT_RST_HIGH();
Clock_Delay1ms(500); // 500ms
}
//********SPI1_Init*****************
// Initialize SPI1 interface to SDC and TFT
// inputs: none
// outputs: none
// outputBitRate = (spiInputClock) / ((1 + SCR) * 2)
// 99 for 400,000 bps slow mode, used during initialization
// 4 for 8,000,000 bps fast mode, used during disk I/O
// Version for both SDC and TFT
int LCDresetFlag;
void SPI1_Init(void){
TimerG0_IntArm(1000,40,1); // initialize TimerG0 for 1 ms interrupts
CS_Init(); // initialize whichever GPIO pin is CS for the SD card
uint32_t busfreq = Clock_Freq();
// assumes GPIOA and GPIOB are reset and powered previously
// RSTCLR to SPI1 peripherals
// bits 31-24 unlock key 0xB1
// bit 1 is Clear reset sticky bit
// bit 0 is reset gpio port
SPI1->GPRCM.RSTCTL = 0xB1000003;
// Enable power to SPI1 peripherals
// PWREN
// bits 31-24 unlock key 0x26
// bit 0 is Enable Power
SPI1->GPRCM.PWREN = 0x26000001;
// configure PB9 PB6 PB8 as alternate SPI1 function
IOMUX->SECCFG.PINCM[PB9INDEX] = 0x00000083; // SPI1 SCLK
// IOMUX->SECCFG.PINCM[PB6INDEX] = 0x00000083; // SPI1 CS0
IOMUX->SECCFG.PINCM[PB8INDEX] = 0x00000083; // SPI1 PICO
IOMUX->SECCFG.PINCM[TFT_RST_INDEX] = 0x00000081; // GPIO output, LCD !RST
IOMUX->SECCFG.PINCM[TFT_DC_INDEX] = 0x00000081; // GPIO output, LCD D/C RS
// IOMUX->SECCFG.PINCM[PB15INDEX] = 0x00000081; // GPIO output, LCD !RST
// IOMUX->SECCFG.PINCM[PB16INDEX] = 0x00000081; // GPIO output, LCD RS
// ** IOMUX->SECCFG.PINCM[PA13INDEX] = 0x00000081; // GPIO output, LCD RS
IOMUX->SECCFG.PINCM[PB7INDEX] = 0x00040083; // SPI1 POCI
IOMUX->SECCFG.PINCM[TFT_CS_INDEX] = 0x00000081; // PB6 is regular GPIO
// IOMUX->SECCFG.PINCM[PB6INDEX] = 0x00000081; // PB6 is regular GPIO
Clock_Delay(24); // time for gpio to power up
TFT_DC->DOE31_0 |= TFT_DC_PIN; // PB16 is LCD RS
// GPIOB->DOE31_0 |= 1<<16; // PB16 is LCD RS
// ** GPIOA->DOE31_0 |= 1<<13; // PA13 is LCD RS
TFT_RST->DOE31_0 |= TFT_RST_PIN;
//GPIOB->DOE31_0 |= 1<<15; // PB15 is LCD !RST
// GPIOB->DOUTSET31_0 = 1<<16; // RS=1
TFT_DC_HIGH();
// ** GPIOA->DOUTSET31_0 = 1<<13; // RS=1
// GPIOB->DOUTSET31_0 = 1<<15; // !RST = 1
TFT_RST_HIGH();
TFT_CS->DOE31_0 |= TFT_CS_PIN; // PB6 is regular GPIO
//GPIOB->DOE31_0 |= 1<<6; // PB6 is regular GPIO
SPI1->CLKSEL = 8; // SYSCLK
// bit 3 SYSCLK
// bit 2 MFCLK
// bit 1 LFCLK
SPI1->CLKDIV = 0; // divide by 1
// bits 2-0 n (0 to 7), divide by n+1
//Set the bit rate clock divider to generate the serial output clock
// outputBitRate = (spiInputClock) / ((1 + SCR) * 2)
// 8,000,000 = (16,000,000)/((0 + 1) * 2)
// 8,000,000 = (32,000,000)/((1 + 1) * 2)
// 6,666,667 = (40,000,000)/((2 + 1) * 2)
// 10,000,000 = (40,000,000)/((1 + 1) * 2)
// 8,000,000 = (80,000,000)/((4 + 1) * 2)
// 8,000,000 = (Clock_Freq)/((m + 1) * 2)
// m = (Clock_Freq/16000000) - 1
if(busfreq <= 16000000){
SPI1->CLKCTL = 0; // frequency= busfreq/2
}else if(busfreq == 40000000){
SPI1->CLKCTL = 1; // frequency= 10MHz
// SPI1->CLKCTL = 2; // frequency= 6.66MHz
}else{
SPI1->CLKCTL = busfreq/16000000 -1; // 8 MHz
}
SPI1->CTL0 = 0x0007;
// bit 14 CSCLR=0 not cleared
// bits 13-12 CSSEL=0 CS0
// bit 9 SPH = 0
// bit 8 SPO = 0
// bits 6-5 FRF = 00 (3 wire)
// bits 4-0 n=7, data size is n+1 (8bit data)
SPI1->CTL1 = 0x0015;
// bits 29-24 RXTIMEOUT=0
// bits 23-16 REPEATX=0 disabled
// bits 15-12 CDMODE=0 manual
// bit 11 CDENABLE=0 CS3
// bit 7-5 =0 no parity
// bit 4=1 MSB first
// bit 3=0 POD (not used, not peripheral)
// bit 2=1 CP controller mode
// bit 1=0 LBM disable loop back
// bit 0=1 enable SPI
TFT_CS_HIGH(); // disable LCD
if(LCDresetFlag) return;
LCDresetFlag = 1;
SPI1_Reset();
}
// SDC CS initialization
void CS_Init(void){
IOMUX->SECCFG.PINCM[SDC_CS_INDEX] = (uint32_t) 0x00000081;
// IOMUX->SECCFG.PINCM[PB0INDEX] = (uint32_t) 0x00000081;
// ** IOMUX->SECCFG.PINCM[PA12INDEX] = (uint32_t) 0x00000081;
SDC_CS->DOE31_0 |= SDC_CS_PIN;
SDC_CS_HIGH(); // PB0=1
}
/* STAT register
* 4 BUSY 0h = SPI is in idle mode. 1h = SPI is currently transmitting and/or receiving data, or transmit FIFO is not empty.
3 RNF Receive FIFO not full 0h = Receive FIFO is full. 1h = Receive FIFO is not full.
2 RFE Receive FIFO empty. 0h = Receive FIFO is not empty. 1h = Receive FIFO is empty.
1 TNF Transmit FIFO not full 0h = Transmit FIFO is full. 1h = Transmit FIFO is not full.
0 TFE Transmit FIFO empty. 0h = Transmit FIFO is not empty. 1h = Transmit FIFO is empty.*/
//---------TFT_OutData------------
// Output 8-bit data to SPI port
// Input: data is an 8-bit data to be transferred
// Output: none
void TFT_OutData(char data){char response;
// while((SPI1->STAT&0x02) == 0x00){}; // spin if TxFifo full
while((SPI1->STAT&0x10) == 0x10){}; // spin if SPI busy
SDC_CS_HIGH(); // PB0 high
TFT_CS_LOW(); // PB6 low
// GPIOB->DOUTSET31_0 = 1<<16; // RS=PB16=1 for data
TFT_DC_HIGH(); // RS=PB16=1 for data
// ** GPIOA->DOUTSET31_0 = 1<<13; // RS=PA13=1 for data
SPI1->TXDATA = data;
while((SPI1->STAT&0x04) == 0x04){}; // spin SPI RxFifo empty
response = SPI1->RXDATA; // has no meaning, flush
TFT_CS_HIGH(); // PB6 high
}
//---------TFT_OutCommand------------
// Output 8-bit command to SPI port
// Input: data is an 8-bit data to be transferred
// Output: none
void TFT_OutCommand(char command){char response;
while((SPI1->STAT&0x10) == 0x10){}; // spin if SPI busy
SDC_CS_HIGH(); // PB0 high
TFT_CS_LOW(); // PB6 low
//GPIOB->DOUTCLR31_0 = 1<<16; // RS=PB16=0 for command
TFT_DC_LOW(); // RS=PB16=0 for command
// ** GPIOA->DOUTCLR31_0 = 1<<13; // RS=PA13=0 for command
SPI1->TXDATA = command;
while((SPI1->STAT&0x10) == 0x10){}; // spin if SPI busy
response = SPI1->RXDATA; // has no meaning, flush
TFT_CS_HIGH(); // PB6 high
}

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/*****************************************************************************
Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the
distribution.
Neither the name of Texas Instruments Incorporated nor the names of
its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
-uinterruptVectors
MEMORY
{
FLASH (RX) : origin = 0x00000000, length = 0x00020000
SRAM (RWX) : origin = 0x20200000, length = 0x00008000
BCR_CONFIG (R) : origin = 0x41C00000, length = 0x00000080
BSL_CONFIG (R) : origin = 0x41C00100, length = 0x00000080
}
SECTIONS
{
.intvecs: > 0x00000000
.text : palign(8) {} > FLASH
.const : palign(8) {} > FLASH
.cinit : palign(8) {} > FLASH
.pinit : palign(8) {} > FLASH
.rodata : palign(8) {} > FLASH
.ARM.exidx : palign(8) {} > FLASH
.init_array : palign(8) {} > FLASH
.binit : palign(8) {} > FLASH
.TI.ramfunc : load = FLASH, palign(8), run=SRAM, table(BINIT)
.vtable : > SRAM
.args : > SRAM
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM (HIGH)
.BCRConfig : {} > BCR_CONFIG
.BSLConfig : {} > BSL_CONFIG
}

22
RTOS_Lab3_RTOSpriority/targetConfigs/MSPM0G3507.ccxml Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="configuration_0">
<instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe">
<instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cortexM0.xml" id="drivers" xml="tixds510cortexM0.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510sec_ap.xml" id="drivers" xml="tixds510sec_ap.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="1" id="The JTAG TCLK Frequency (MHz)">
<choice Name="Fixed with user specified value" value="SPECIFIC">
<property Type="stringfield" Value="1MHz" id="-- Enter a value from 100.0kHz to 2.5MHz"/>
</choice>
</property>
<property Type="choicelist" Value="2" id="SWD Mode Settings">
<choice Name="SWD Mode - Aux COM port is target TDO pin" value="nothing"/>
</property>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="MSPM0G3507" href="devices/MSPM0G3507.xml" id="MSPM0G3507" xml="MSPM0G3507.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>

9
RTOS_Lab3_RTOSpriority/targetConfigs/readme.txt Normal file
View File

@@ -0,0 +1,9 @@
The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based
on the device and connection settings specified in your project on the Properties > General page.
Please note that in automatic target-configuration management, changes to the project's device and/or
connection settings will either modify an existing or generate a new target-configuration file. Thus,
if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively,
you may create your own target-configuration file for this project and manage it manually. You can
always switch back to automatic target-configuration management by checking the "Manage the project's
target-configuration automatically" checkbox on the project's Properties > General page.

201
RTOS_Lab3_RTOSpriority/ticlang/startup_mspm0g3507_ticlang.c Normal file
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/*****************************************************************************
Special MSPM0_ValvanoWare version with Hardfault handler implemented
Jonathan Valvano 12/19/2024
Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the
distribution.
Neither the name of Texas Instruments Incorporated nor the names of
its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#include <stdint.h>
#include <ti/devices/msp/msp.h>
/* Linker variable that marks the top of the stack. */
extern unsigned long __STACK_END;
/* External declaration for the reset handler that is to be called when the */
/* processor is started */
extern __NO_RETURN void __PROGRAM_START(void);
/* Forward declaration of the default fault handlers. */
void Default_Handler (void) __attribute__((weak));
void HardFault_Handler (void) __attribute__((weak));
extern void Reset_Handler (void) __attribute__((weak));
/* Processor Exceptions */
extern void NMI_Handler (void) __attribute__((weak, alias("Default_Handler")));
extern void SVC_Handler (void) __attribute__((weak, alias("Default_Handler")));
extern void PendSV_Handler (void) __attribute__((weak, alias("Default_Handler")));
extern void SysTick_Handler (void) __attribute__((weak, alias("Default_Handler")));
/* Device Specific Interrupt Handlers */
extern void GROUP0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void GROUP1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG8_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART3_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void ADC0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void ADC1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void CANFD0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void DAC0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void SPI0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void SPI1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART2_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG6_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMA0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMA1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG7_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG12_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void I2C0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void I2C1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void AES_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void RTC_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void DMA_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
/* Interrupt vector table. Note that the proper constructs must be placed on this to */
/* ensure that it ends up at physical address 0x0000.0000 or at the start of */
/* the program if located at a start address other than 0. */
#if defined (__ARM_ARCH) && (__ARM_ARCH != 0)
void (* const interruptVectors[])(void) __attribute((used)) __attribute__((section (".intvecs"))) =
#elif defined (__TI_ARM__)
#pragma RETAIN(interruptVectors)
#pragma DATA_SECTION(interruptVectors, ".intvecs")
void (* const interruptVectors[])(void) =
#else
#error "Compiler not supported"
#endif
{
(void (*)(void))((uint32_t)&__STACK_END),
/* The initial stack pointer */
Reset_Handler, /* The reset handler */
NMI_Handler, /* The NMI handler */
HardFault_Handler, /* The hard fault handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
SVC_Handler, /* SVCall handler */
0, /* Reserved */
0, /* Reserved */
PendSV_Handler, /* The PendSV handler */
SysTick_Handler, /* SysTick handler */
GROUP0_IRQHandler, /* GROUP0 interrupt handler */
GROUP1_IRQHandler, /* GROUP1 interrupt handler */
TIMG8_IRQHandler, /* TIMG8 interrupt handler */
UART3_IRQHandler, /* UART3 interrupt handler */
ADC0_IRQHandler, /* ADC0 interrupt handler */
ADC1_IRQHandler, /* ADC1 interrupt handler */
CANFD0_IRQHandler, /* CANFD0 interrupt handler */
DAC0_IRQHandler, /* DAC0 interrupt handler */
0, /* Reserved */
SPI0_IRQHandler, /* SPI0 interrupt handler */
SPI1_IRQHandler, /* SPI1 interrupt handler */
0, /* Reserved */
0, /* Reserved */
UART1_IRQHandler, /* UART1 interrupt handler */
UART2_IRQHandler, /* UART2 interrupt handler */
UART0_IRQHandler, /* UART0 interrupt handler */
TIMG0_IRQHandler, /* TIMG0 interrupt handler */
TIMG6_IRQHandler, /* TIMG6 interrupt handler */
TIMA0_IRQHandler, /* TIMA0 interrupt handler */
TIMA1_IRQHandler, /* TIMA1 interrupt handler */
TIMG7_IRQHandler, /* TIMG7 interrupt handler */
TIMG12_IRQHandler, /* TIMG12 interrupt handler */
0, /* Reserved */
0, /* Reserved */
I2C0_IRQHandler, /* I2C0 interrupt handler */
I2C1_IRQHandler, /* I2C1 interrupt handler */
0, /* Reserved */
0, /* Reserved */
AES_IRQHandler, /* AES interrupt handler */
0, /* Reserved */
RTC_IRQHandler, /* RTC interrupt handler */
DMA_IRQHandler, /* DMA interrupt handler */
};
/* Forward declaration of the default fault handlers. */
/* This is the code that gets called when the processor first starts execution */
/* following a reset event. Only the absolutely necessary set is performed, */
/* after which the application supplied entry() routine is called. Any fancy */
/* actions (such as making decisions based on the reset cause register, and */
/* resetting the bits in that register) are left solely in the hands of the */
/* application. */
void Reset_Handler(void)
{
/* Jump to the ticlang C Initialization Routine. */
__asm(" .global _c_int00\n"
" b _c_int00");
}
// fetch the PC that triggered the hard fault
// message in a bottle
void HardFault_Handler(void) {
__asm(" MOV R7,SP\n" // this code prevents a hardfault within the hardfault handler
" LDR R4,=0x20200000\n" // start of RAM
" CMP R7,R4\n"
" BLO fault\n" // skip if bad SP
" LDR R5,=0x20207FE0\n" // end of RAM-32
" CMP R7,R5\n"
" BHI fault\n" // skip if bad SP
" LDR R6,[SP,#24]\n" // R6=previous PC
"fault:");
while (1) {
// option 1) if SP points to valid RAM (0x20200000 to 0x20207FFC)
// then R6 has PC that caused the fault
// option 2) if SP is not 0x20200000 to 0x20207FFC then there was a stack overflow
// if you're here, you had a hardfault
}
}
/* This is the code that gets called when the processor receives an unexpected */
/* interrupt. This simply enters an infinite loop, preserving the system state */
/* for examination by a debugger. */
void Default_Handler(void)
{
__asm(" MOV R7,SP\n"
" LDR R4,=0x20200000\n"
" CMP R7,R4\n"
" BLO dfault\n" // bad SP
" LDR R5,=0x20207FE0\n"
" CMP R7,R5\n"
" BHI fault\n" // bad SP
" LDR R6,[SP,#24]\n" // previous PC
"dfault:");
/* Enter an infinite loop. */
while(1){
// R6 has value of the PC when the interrupt was triggered
// you are here probably because you armed an interrupt, but mistyped the ISR name
}
}