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pulipakaa24
2026-06-12 02:55:04 -07:00
commit 30406f4f49
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RTOSVerySimple/.clangd Normal file
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RTOSVerySimple/.project Normal file
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RTOSVerySimple/.settings/org.eclipse.cdt.codan.core.prefs Normal file
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42
RTOSVerySimple/Debug/.clangd/compile_commands.json Normal file
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{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/osSimple.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug/syscfg\"",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/osasmSimple.s"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/ticlang/startup_mspm0g3507_ticlang.c"
},
{
"directory" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug",
"command" : "clang++ -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source/third_party/CMSIS/Core/Include\" -I\"/Applications/ti/mspm0_sdk_2_09_00_01/source\" -D__MSPM0G3507__ -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/armv7em-ti-none-eabihf/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c++/v1\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/lib/clang/18/include\" -isystem\"/Applications/ti/ccs2040/ccs/tools/compiler/ti-cgt-armllvm_4.0.4.LTS/include/c\" -I\"/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/Debug/syscfg\" -std=c99 -xc",
"file" : "/Users/adipu/lab-7-tweinstein-1/RTOSVerySimple/user.c"
}
]

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html xmlns:v="urn:schemas-microsoft-com:vml"
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<body style="background-color: white;" alink="#0000ff" lang="EN-US"
link="blue" vlink="#c40026">
<div class="WordSection1">
<p style="text-align: center;" align="center"><span
style="font-size: 18pt;">ECE319K_Lab1</span><br>
<table class="MsoNormalTable"
style="border: 3pt outset ; background: rgb(255, 204, 153) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; width: 100%;"
border="1" cellpadding="0" width="100%">
<tr>
<td>
<p><b><span style="font-size: 18pt;">Readme</b></span>
<br> &nbsp;<br>
This is the starter project for ECE319K Lab 1.
For more information about Lab 1, see
<a href="https://docs.google.com/document/d/1cY3-rhal_bWPhGae6U46LhC7vQ8Hntl-oeOAQVJRb7Q/" target ="_blank">
Lab 1. Introduction to Cortex M Assembly</a>.
When running this project, the USB cable must be attached
to the PC and a terminal program (Putty or CCS terminal) must be
opened with a baud rate of 115200 bits/sec. <br>&nbsp;<br>
Derived from Texas Instrument code
<ul>
<li>uart_rw_multibyte_fifo_poll_LP_MSPM0G3507_nortos_ticlang</li>
<li>gpio_toggle_output_LP_MSPM0G3507_nortos_ticlang</li>
</ul>
</td>
</tr>
</table>
</p>
<table class="MsoNormalTable"
style="border: 3pt outset ; background: rgb(252, 243, 144) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; width: 100%;"
border="1" cellpadding="0" width="100%">
<tbody>
<tr>
<td>
<p><b><span style="font-size: 18pt;">Hardware Required</b></span>
<br>
<ul>
<li>MSPM0G3507 LaunchPad&trade; Development Kit (LP-MSPM0G3507)</li>
</ul>
<p class="PictureWide"><span lang="en-US"><img src="../inc/LaunchPad.png" width="500"
></span></p>
<b><span style="font-size: 18pt;">Pin assignments</b></span>
<br>
<ul>
<li>Serial TxD: PA10 is UART0 Tx (MSPM0 to PC) index 20 in IOMUX PINCM table</li>
<li>Serial RxD: PA11 is UART0 Rx (PC to MSPM0) index 21 in IOMUX PINCM table</li>
</ul>
<b><span style="font-size: 18pt;">LaunchPad Jumpers</b></span>
<br>
<ul>
<li>J21: Connects PA10 to XDS_UART</li>
<li>J22: Connects PA11 to XDS_UART</li>
</ul>
</p> </td>
</tr>
</tbody>
</table>
</body>
</html>
<p>
Simplified BSD License (FreeBSD License)
Copyright &copy; 2023, Jonathan Valvano, All rights reserved.<br>
&nbsp;<br>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:<br>
<ol>
<li>Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.</li>
<li>Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.</li></ol>
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>
&nbsp;<br>
The views and conclusions contained in the software and documentation are
those of the authors and should not be interpreted as representing official
policies, either expressed or implied, of the FreeBSD Project.
<br> &nbsp;
</p>
<p>For more information, see <a href="http://users.ece.utexas.edu/~valvano/">
http://users.ece.utexas.edu/~valvano/</a>.
</p>
</div>
</body>
</html>

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RTOSVerySimple/mspm0g3507.cmd Executable file
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/*****************************************************************************
Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the
distribution.
Neither the name of Texas Instruments Incorporated nor the names of
its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
-uinterruptVectors
MEMORY
{
FLASH (RX) : origin = 0x00000000, length = 0x00020000
SRAM (RWX) : origin = 0x20200000, length = 0x00008000
BCR_CONFIG (R) : origin = 0x41C00000, length = 0x00000080
BSL_CONFIG (R) : origin = 0x41C00100, length = 0x00000080
}
SECTIONS
{
.intvecs: > 0x00000000
.text : palign(8) {} > FLASH
.const : palign(8) {} > FLASH
.cinit : palign(8) {} > FLASH
.pinit : palign(8) {} > FLASH
.rodata : palign(8) {} > FLASH
.ARM.exidx : palign(8) {} > FLASH
.init_array : palign(8) {} > FLASH
.binit : palign(8) {} > FLASH
.TI.ramfunc : load = FLASH, palign(8), run=SRAM, table(BINIT)
.vtable : > SRAM
.args : > SRAM
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM (HIGH)
.BCRConfig : {} > BCR_CONFIG
.BSLConfig : {} > BSL_CONFIG
}

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RTOSVerySimple/osSimple.c Normal file
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// os.c
// Runs on LM4F120/TM4C123
// A very simple real time operating system with minimal features.
// Jonathan Valvano
// June 8, 2025
/*
Copyright 2025 by Jonathan W. Valvano, valvano@mail.utexas.edu
You may use, edit, run or distribute this file
as long as the above copyright notice remains
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
For more information about my classes, my research, and my books, see
http://users.ece.utexas.edu/~valvano/
*/
#include <stdint.h>
#include "osSimple.h"
#include <ti/devices/msp/msp.h>
#include "../inc/Clock.h"
#define STACKSIZE 100
uint32_t *tcbs[4];
uint32_t RunI; // index of currently running thread (0,1,2,3)
uint32_t Stacks[4][STACKSIZE];
void OS_AddThreads(void(*task0)(void), void(*task1)(void),
void(*task2)(void), void(*task3)(void)){
tcbs[0] = &Stacks[0][STACKSIZE-12]; // thread stack pointer
Stacks[0][STACKSIZE-1] = 0x01000000; // thumb bit
Stacks[0][STACKSIZE-2] = (int32_t)(task0); // PC
tcbs[1] = &Stacks[1][STACKSIZE-12]; // thread stack pointer
Stacks[1][STACKSIZE-1] = 0x01000000; // thumb bit
Stacks[1][STACKSIZE-2] = (int32_t)(task1); // PC
tcbs[2] = &Stacks[2][STACKSIZE-12]; // thread stack pointer
Stacks[2][STACKSIZE-1] = 0x01000000; // thumb bit
Stacks[2][STACKSIZE-2] = (int32_t)(task2); // PC
tcbs[3] = &Stacks[3][STACKSIZE-12]; // thread stack pointer
Stacks[3][STACKSIZE-1] = 0x01000000; // thumb bit
Stacks[3][STACKSIZE-2] = (int32_t)(task3); // PC
RunI = 0; // thread 0 will run first
}
// ******** OS_Init ************
// initialize operating system, disable interrupts until OS_Launch
// input: none
// output: none
void OS_Init(void){
SysTick->CTRL = 0; // disable SysTick during setup
SysTick->VAL= 0; // any write to current clears it
SCB->SHP[1] = (SCB->SHP[1]&(~0xC0000000))|(3<<30); // priority 3
}
///******** OS_Launch ***************
// start the scheduler, enable interrupts
// Inputs: number of 12.5ns clock cycles for each time slice
// (maximum of 24 bits)
// Outputs: none (does not return)
void OS_Launch(uint32_t theTimeSlice){
SysTick->LOAD = theTimeSlice - 1; // reload value
SysTick->CTRL = 0x00000007; // enable, core clock and interrupt arm
StartOS(); // start on the first task
}

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RTOSVerySimple/osSimple.h Normal file
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// os.h
// Runs on MSPM0
// A very simple real time operating system with minimal features.
// Jonathan Valvano
// June 8, 2025
/*
Copyright 2025 by Jonathan W. Valvano, valvano@mail.utexas.edu
You may use, edit, run or distribute this file
as long as the above copyright notice remains
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
For more information about my classes, my research, and my books, see
http://users.ece.utexas.edu/~valvano/
*/
#ifndef __OS_H
#define __OS_H 1
// fill these depending on your clock
#define TIME_1MS 80000
#define TIME_2MS 2*TIME_1MS
#define TIME_5MS 5*TIME_1MS
// function definitions in osasmSimple.s
void OS_DisableInterrupts(void); // Disable interrupts
void OS_EnableInterrupts(void); // Enable interrupts
void StartOS(void);
// ******** OS_Init ************
// initialize operating system, disable interrupts until OS_Launch
// initialize OS controlled I/O: systick, 50 MHz PLL
// input: none
// output: none
void OS_Init(void);
//******** OS_AddThread ***************
// add three foregound threads to the scheduler
// Inputs: three pointers to a void/void foreground tasks
// Outputs: 1 if successful, 0 if this thread can not be added
void OS_AddThreads(void(*task0)(void),
void(*task1)(void),
void(*task2)(void),void(*task3)(void));
//******** OS_Launch ***************
// start the scheduler, enable interrupts
// Inputs: number of 20ns clock cycles for each time slice
// (maximum of 24 bits)
// Outputs: none (does not return)
void OS_Launch(uint32_t theTimeSlice);
#endif

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RTOSVerySimple/osasmSimple.s Normal file
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/* ****************************************************************************
; osasmSimple.s: low-level OS commands, written in assembly *
; Runs on MSPM0
; A very simple real time operating system with minimal features.
; Jonathan Valvano
; June 12, 2025
;
;Copyright 2025 by Jonathan W. Valvano, valvano@mail.utexas.edu
; You may use, edit, run or distribute this file
; as long as the above copyright notice remains
; THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
; OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; For more information about my classes, my research, and my books, see
; http://users.ece.utexas.edu/~valvano/
;
*/
.data
.align 2
// Declare global variables here if needed
// with the .space assembly directive
.text
.thumb
.align 2
.global RunI // currently running thread
.global tcbs // array of TCBs
.global OS_DisableInterrupts
.global OS_EnableInterrupts
.global StartOS
.global SysTick_Handler
OS_DisableInterrupts:
CPSID I
BX LR
OS_EnableInterrupts:
CPSIE I
BX LR
.type SysTick_Handler, %function
SysTick_Handler: // 1) Saves R0-R3,R12,LR,PC,PSR
CPSID I // 2) Prevent interrupt during switch
PUSH {R4-R7} // 3) Save remaining regs r4-r7
LDR R0,=RunI // 4) R0=pointer to RunI, old thread
LDR R1,[R0] // R1 = RunI
LSLS R2,R1,#2 // R2 = RunI*4
LDR R3,=tcbs // points to tcbs
ADDS R4,R3,R2 // points to tcbs[RunI]
MOV R5,SP
STR R5,[R4] // 5) Save SP into TCB
ADDS R1,#1 // 6) R1 = RunI+1
MOVS R6,#3
ANDS R1,R6 // wrap 4 to 0
STR R1,[R0] // RunI = R1
LSLS R2,R1,#2 // R2 = RunI*4
ADDS R4,R3,R2 // points to tcbs[RunI]
LDR R5,[R4] // 7) new thread SP SP = tcbs[RunI]
MOV SP,R5
POP {R4-R7} // 8) restore regs r4-r7
CPSIE I // 9) tasks run with interrupts enabled
BX LR // 10) restore R0-R3,R12,LR,PC,PSR
StartOS:
LDR R0, =RunI // 4) R0=pointer to RunI, old thread
LDR R1, [R0] // R1 = RunI
LSLS R2,R1,#2 // R2 = RunI*4
LDR R3,=tcbs // points to tcbs
ADD R3,R2 // points to tcbs[RunI]
LDR R5, [R3] // new thread SP SP = tcbs[RunI]
MOV SP,R5
POP {R4-R7} // restore regs r4-7
POP {R0-R3} // restore regs r0-3
ADD SP,#4 // discard R12
ADD SP,#4 // discard LR from initial stack
POP {R0} // start location
ADD SP,#4 // discard PSR
CPSIE I // Enable interrupts at processor level
BX R0 // start first thread
.end

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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<configurations XML_version="1.2" id="configurations_0">
<configuration XML_version="1.2" id="configuration_0">
<instance XML_version="1.2" desc="Texas Instruments XDS110 USB Debug Probe" href="connections/TIXDS110_Connection.xml" id="Texas Instruments XDS110 USB Debug Probe" xml="TIXDS110_Connection.xml" xmlpath="connections"/>
<connection XML_version="1.2" id="Texas Instruments XDS110 USB Debug Probe">
<instance XML_version="1.2" href="drivers/tixds510cs_dap.xml" id="drivers" xml="tixds510cs_dap.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510cortexM0.xml" id="drivers" xml="tixds510cortexM0.xml" xmlpath="drivers"/>
<instance XML_version="1.2" href="drivers/tixds510sec_ap.xml" id="drivers" xml="tixds510sec_ap.xml" xmlpath="drivers"/>
<property Type="choicelist" Value="1" id="The JTAG TCLK Frequency (MHz)">
<choice Name="Fixed with user specified value" value="SPECIFIC">
<property Type="stringfield" Value="1MHz" id="-- Enter a value from 100.0kHz to 2.5MHz"/>
</choice>
</property>
<property Type="choicelist" Value="2" id="SWD Mode Settings">
<choice Name="SWD Mode - Aux COM port is target TDO pin" value="nothing"/>
</property>
<platform XML_version="1.2" id="platform_0">
<instance XML_version="1.2" desc="MSPM0G3507" href="devices/MSPM0G3507.xml" id="MSPM0G3507" xml="MSPM0G3507.xml" xmlpath="devices"/>
</platform>
</connection>
</configuration>
</configurations>

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RTOSVerySimple/targetConfigs/readme.txt Normal file
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The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based
on the device and connection settings specified in your project on the Properties > General page.
Please note that in automatic target-configuration management, changes to the project's device and/or
connection settings will either modify an existing or generate a new target-configuration file. Thus,
if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively,
you may create your own target-configuration file for this project and manage it manually. You can
always switch back to automatic target-configuration management by checking the "Manage the project's
target-configuration automatically" checkbox on the project's Properties > General page.

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RTOSVerySimple/ticlang/startup_mspm0g3507_ticlang.c Normal file
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/*****************************************************************************
Special MSPM0_ValvanoWare version with Hardfault handler implemented
Jonathan Valvano 12/19/2024
Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the
distribution.
Neither the name of Texas Instruments Incorporated nor the names of
its contributors may be used to endorse or promote products derived
from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#include <stdint.h>
#include <ti/devices/msp/msp.h>
/* Linker variable that marks the top of the stack. */
extern unsigned long __STACK_END;
/* External declaration for the reset handler that is to be called when the */
/* processor is started */
extern __NO_RETURN void __PROGRAM_START(void);
/* Forward declaration of the default fault handlers. */
void Default_Handler (void) __attribute__((weak));
void HardFault_Handler (void) __attribute__((weak));
extern void Reset_Handler (void) __attribute__((weak));
/* Processor Exceptions */
extern void NMI_Handler (void) __attribute__((weak, alias("Default_Handler")));
extern void SVC_Handler (void) __attribute__((weak, alias("Default_Handler")));
extern void PendSV_Handler (void) __attribute__((weak, alias("Default_Handler")));
extern void SysTick_Handler (void) __attribute__((weak, alias("Default_Handler")));
/* Device Specific Interrupt Handlers */
extern void GROUP0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void GROUP1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG8_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART3_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void ADC0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void ADC1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void CANFD0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void DAC0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void SPI0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void SPI1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART2_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void UART0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG6_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMA0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMA1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG7_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void TIMG12_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void I2C0_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void I2C1_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void AES_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void RTC_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
extern void DMA_IRQHandler (void) __attribute__((weak, alias("Default_Handler")));
/* Interrupt vector table. Note that the proper constructs must be placed on this to */
/* ensure that it ends up at physical address 0x0000.0000 or at the start of */
/* the program if located at a start address other than 0. */
#if defined (__ARM_ARCH) && (__ARM_ARCH != 0)
void (* const interruptVectors[])(void) __attribute((used)) __attribute__((section (".intvecs"))) =
#elif defined (__TI_ARM__)
#pragma RETAIN(interruptVectors)
#pragma DATA_SECTION(interruptVectors, ".intvecs")
void (* const interruptVectors[])(void) =
#else
#error "Compiler not supported"
#endif
{
(void (*)(void))((uint32_t)&__STACK_END),
/* The initial stack pointer */
Reset_Handler, /* The reset handler */
NMI_Handler, /* The NMI handler */
HardFault_Handler, /* The hard fault handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
SVC_Handler, /* SVCall handler */
0, /* Reserved */
0, /* Reserved */
PendSV_Handler, /* The PendSV handler */
SysTick_Handler, /* SysTick handler */
GROUP0_IRQHandler, /* GROUP0 interrupt handler */
GROUP1_IRQHandler, /* GROUP1 interrupt handler */
TIMG8_IRQHandler, /* TIMG8 interrupt handler */
UART3_IRQHandler, /* UART3 interrupt handler */
ADC0_IRQHandler, /* ADC0 interrupt handler */
ADC1_IRQHandler, /* ADC1 interrupt handler */
CANFD0_IRQHandler, /* CANFD0 interrupt handler */
DAC0_IRQHandler, /* DAC0 interrupt handler */
0, /* Reserved */
SPI0_IRQHandler, /* SPI0 interrupt handler */
SPI1_IRQHandler, /* SPI1 interrupt handler */
0, /* Reserved */
0, /* Reserved */
UART1_IRQHandler, /* UART1 interrupt handler */
UART2_IRQHandler, /* UART2 interrupt handler */
UART0_IRQHandler, /* UART0 interrupt handler */
TIMG0_IRQHandler, /* TIMG0 interrupt handler */
TIMG6_IRQHandler, /* TIMG6 interrupt handler */
TIMA0_IRQHandler, /* TIMA0 interrupt handler */
TIMA1_IRQHandler, /* TIMA1 interrupt handler */
TIMG7_IRQHandler, /* TIMG7 interrupt handler */
TIMG12_IRQHandler, /* TIMG12 interrupt handler */
0, /* Reserved */
0, /* Reserved */
I2C0_IRQHandler, /* I2C0 interrupt handler */
I2C1_IRQHandler, /* I2C1 interrupt handler */
0, /* Reserved */
0, /* Reserved */
AES_IRQHandler, /* AES interrupt handler */
0, /* Reserved */
RTC_IRQHandler, /* RTC interrupt handler */
DMA_IRQHandler, /* DMA interrupt handler */
};
/* Forward declaration of the default fault handlers. */
/* This is the code that gets called when the processor first starts execution */
/* following a reset event. Only the absolutely necessary set is performed, */
/* after which the application supplied entry() routine is called. Any fancy */
/* actions (such as making decisions based on the reset cause register, and */
/* resetting the bits in that register) are left solely in the hands of the */
/* application. */
void Reset_Handler(void)
{
/* Jump to the ticlang C Initialization Routine. */
__asm(" .global _c_int00\n"
" b _c_int00");
}
// fetch the PC that triggered the hard fault
void HardFault_Handler(void) {
__asm(" MOV R7,SP\n" // this code prevents a hardfault within the hardfault handler
" LDR R4,=0x20200000\n" // start of RAM
" CMP R7,R4\n"
" BLO fault\n" // skip if bad SP
" LDR R5,=0x20207FE0\n" // end of RAM-32
" CMP R7,R5\n"
" BHI fault\n" // skip if bad SP
" LDR R6,[SP,#24]\n" // R6=previous PC
"fault:");
while (1) {
// option 1) if SP points to valid RAM (0x20200000 to 0x20207FFC)
// then R6 has PC that caused the fault
// option 2) if SP is not 0x20200000 to 0x20207FFC then there was a stack overflow
// if you're here, you had a hardfault
}
}
/* This is the code that gets called when the processor receives an unexpected */
/* interrupt. This simply enters an infinite loop, preserving the system state */
/* for examination by a debugger. */
void Default_Handler(void)
{
__asm(" MOV R7,SP\n"
" LDR R4,=0x20200000\n"
" CMP R7,R4\n"
" BLO dfault\n" // bad SP
" LDR R5,=0x20207FE0\n"
" CMP R7,R5\n"
" BHI fault\n" // bad SP
" LDR R6,[SP,#24]\n" // previous PC
"dfault:");
/* Enter an infinite loop. */
while(1){
// R6 has value of the PC when the interrupt was triggered
// you are here probably because you armed an interrupt, but mistyped the ISR name
}
}

88
RTOSVerySimple/user.c Normal file
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@@ -0,0 +1,88 @@
//*****************************************************************************
// user.c
// Runs on MSPM0
// An example user program that initializes the simple operating system
// Schedule three independent threads using preemptive round robin
// Each thread rapidly toggles a pin on Port B and increments its counter
// TIMESLICE is how long each thread runs
// Jonathan Valvano
// June 8, 2025
/*
Copyright 2025 by Jonathan W. Valvano, valvano@mail.utexas.edu
You may use, edit, run or distribute this file
as long as the above copyright notice remains
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
VALVANO SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
For more information about my classes, my research, and my books, see
http://users.ece.utexas.edu/~valvano/
*/
#include <stdint.h>
#include "osSimple.h"
#include "../inc/Clock.h"
#include "../inc/TExaS.h"
#include <ti/devices/msp/msp.h>
#include "../inc/LaunchPad.h"
#define TIMESLICE (TIME_2MS) // thread switch time in system time units
void OS_DisableInterrupts(void); // Disable interrupts
void OS_EnableInterrupts(void); // Enable interrupts
uint32_t Count0; // number of times Task0 loops
uint32_t Count1; // number of times Task1 loops
uint32_t Count2; // number of times Task2 loops
uint32_t Count3; // number of times Task3 loops
void Task0(void){
Count0 = 0;
for(;;){
Count0++;
GPIOA->DOUTTGL31_0 = 0x01; // toggle PA0
Clock_Delay(1000);
}
}
void Task1(void){
Count1 = 0;
for(;;){
Count1++;
GPIOA->DOUTTGL31_0 = 0x02; // toggle PA1
Clock_Delay(1000);
}
}
void Task2(void){
Count2 = 0;
for(;;){
Count2++;
GPIOA->DOUTTGL31_0 = 0x04; // toggle PA2
Clock_Delay(1000);
}
}
void Task3(void){
Count3 = 0;
for(;;){
Count3++;
GPIOA->DOUTTGL31_0 = 0x08; // toggle PA3
Clock_Delay(1000);
}
}
void PortA_Init(void){
IOMUX->SECCFG.PINCM[PA0INDEX] = (uint32_t) 0x00000081;
IOMUX->SECCFG.PINCM[PA1INDEX] = (uint32_t) 0x00000081;
IOMUX->SECCFG.PINCM[PA2INDEX] = (uint32_t) 0x00000081;
IOMUX->SECCFG.PINCM[PA3INDEX] = (uint32_t) 0x00000081;
GPIOA->DOE31_0 |= 0x0F;
}
int main(void){
OS_DisableInterrupts();
LaunchPad_Init();
Clock_Init80MHz(0); // set processor clock to 80 MHz
TExaS_Init(0,0,TExaS_PA60Logic);
OS_Init(); // initialize OS
PortA_Init();
OS_AddThreads(&Task0, &Task1, &Task2, &Task3);
OS_Launch(TIMESLICE); // doesn't return, interrupts enabled in here
return 0; // this never executes
}