/*! * @defgroup LaunchPad * @brief LaunchPad input/output
Pins on the MSPM0G3507 LaunchPad
Pin GPIOHardware
PA0 outputred LED1, index 0 in IOMUX PINCM table, negative logic
PB22outputBLUE LED2, index 49 in IOMUX PINCM table
PB26outputRED LED2, index 56 in IOMUX PINCM table
PB27outputGREEN LED2, index 57 in IOMUX PINCM table
PA18input S1 positive logic switch, index 39 in IOMUX PINCM table
PB21input S2 negative logic switch, index 48 in IOMUX PINCM table
* @{*/ /** * @file LaunchPad.h * @brief Initialize LaunchPad switches and LEDs * @details MSPM0G3507 LaunchPad Development Kit (LP-MSPM0G3507)
* For more information see
https://www.ti.com/product/LP-MSPM0G3507/part-details/LP-MSPM0G3507
* \image html Fg01_07_02_LaunchPad.png width=500px * \image latex Fg01_07_02_LaunchPad.png "TI MSPM0 LaunchPad" width=10cm * The following is a simplified circuit diagram
* \image html LaunchPadCircuit.png width=500px * \image latex LaunchPadCircuit.png "LP-MSPM0G3507 Circuit Diagram" width=10cm
* - LaunchPad Jumpers * - J4 Connects PA0 to red LED1 * - J5: Connects PB22 to blue LED2 * - J6: Connects PB26 to red LED2 * - J7: Connects PB27 to green LED2 * @version ECE319K v1.2 * @author Daniel Valvano and Jonathan Valvano * @copyright Copyright 2025 by Jonathan W. Valvano, valvano@mail.utexas.edu, * @warning AS-IS * @note For more information see http://users.ece.utexas.edu/~valvano/ * @date November 3, 2025
Pins on the MSPM0G3507 LaunchPad
Pin GPIOHardware
PA0 outputRED LED1, index 0 in IOMUX PINCM table, negative logic
PB22outputBLUE LED2, index 49 in IOMUX PINCM table
PB26outputRED LED2, index 56 in IOMUX PINCM table
PB27outputGREEN LED2, index 57 in IOMUX PINCM table
PA18input S1 positive logic switch, index 39 in IOMUX PINCM table
PB21input S2 negative logic switch, index 48 in IOMUX PINCM table
Mode=0 selects the GPIO pin
PINCM Mode values for the MSPM0G3507
NameValueMode=2Mode=3Mode=4Mode=5Mode=6Mode=7Mode=8Mode=9
PA0INDEX0UART0_TXI2C0_SDATIMA0_C0TIMA_FAL1TIMG8_C1FCC_IN
PA1INDEX1UART0_RXI2C0_SCLTIMA0_C1TIMA_FAL2TIMG8_IDXTIMG8_C0
PA2INDEX6TIMG8_C1SPI0_CS0TIMG7_C1SPI1_CS0
PA3INDEX7TIMG8_C0SPI0_CS1UART2_CTSTIMA0_C2COMP1_OUTTIMG7_C0TIMA0_C1I2C1_SDA
PA4INDEX8TIMG8_C1SPI0_POCIUART2_RTSTIMA0_C3LFCLK_INTIMG7_C1TIMA0_C1NI2C1_SCL
PA5INDEX9TIMG8_C0SPI0_PICOTIMA_FAL1TIMG0_C0TIMG6_C0FCC_IN
PA6INDEX10TTIMG8_C1SPI0_SCKTIMA_FAL0TIMG0_C1HFCLK_INTIMG6_C1TIMA0_C2N
PA7INDEX13COMP0_OUTCLK_OUTTIMG8_C0TIMA0_C2TIMG8_IDXTIMG7_C1TIMA0_C1
PA8INDEX18UART1_TXSPI0_CS0UART0_RTSTIMA0_C0TIMA1_C0N
PA9INDEX19UART1_RXSPI0_PICOUART0_CTSTIMA0_C1RTC_OUTTIMA0_C0NTIMA1_C1NCLK_OUT
PA10INDEX20UART0_TXSPI0_POCII2C0_SDATIMA1_C0TIMG12_C0TIMA0_C2I2C1_SDACLK_OUT
PA11INDEX21UART0_RXSPI0_SCKI2C0_SCLTIMA1_C1COMP0_OUTTIMA0_C2NI2C1_SCL
PA12INDEX33UART3_CTSSPI0_SCKTIMG0_C0CAN_TXTIMA0_C3FCC_IN
PA13INDEX34UART3_RTSSPI0_POCIUART3_RXTIMG0_C1CAN_RXTIMA0_C3N
PA14INDEX35UART0_CTSSPI0_PICOUART3_TXTIMG12_C0CLK_OUT
PA15INDEX36UART0_RTSSPI1_CS2I2C1_SCLTIMA1_C0TIMG8_IDXTIMA1_C0NTIMA0_C2
PA16INDEX37COMP2_OUTSPI1_POCII2C1_SDATIMA1_C1TIMA1_C1NTIMA0_C2NFCC_IN
PA17INDEX38UART1_TXSPI1_SCKI2C1_SCLTIMA0_C3TIMG7_C0TIMA1_C0
PA18INDEX39UART1_RXSPI1_PICOI2C1_SDATIMA0_C3NTIMG7_C1TIMA1_C1
PA19INDEX40SWDIO
PA20INDEX41SWCLK
PA21INDEX45UART2_TXTIMG8_C0UART1_CTSTIMA0_C0TIMG6_C0
PA22INDEX46UART2_RXTIMG8_C1UART1_RTSTIMA0_C1CLK_OUTTIMA0_C0NTIMG6_C1
PA23INDEX52UART2_TXSPI0_CS3TIMA0_C3TIMG0_C0UART3_CTSTIMG7_C0TIMG8_C0
PA24INDEX53UART2_RXSPI0_CS2TIMA0_C3NTIMG0_C1UART3_RTSTIMG7_C1TIMA1_C1
PA25INDEX54UART3_RXSPI1_CS3TIMG12_C1TIMA0_C3TIMA0_C1N
PA26INDEX58UART3_TXSPI1_CS0TIMG8_C0TIMA_FAL0CAN_TXTIMG7_C0
PA27INDEX59RTC_OUTSPI1_CS1TIMG8_C1TIMA_FAL2CAN_RXTIMG7_C1
PA28INDEX2UART0_TXI2C0_SDATIMA0_C3TIMA_FAL0TIMG7_C0TIMA1_C0
PA29INDEX3I2C1_SCLUART2_RTSTIMG8_C0TIMG6_C0
PA30INDEX4I2C1_SDAUART2_CTSTIMG8_C1TIMG6_C1
PA31INDEX5UART0_RXI2C0_SCLTIMA0_C3NTIMG12_C1CLK_OUTTIMG7_C1TIMA1_C1
PB0INDEX11UART0_TXSPI1_CS2TIMA1_C0TIMA0_C2
PB1INDEX12UART0_RXSPI1_CS3TIMA1_C1TIMA0_C2N
PB2INDEX14UART3_TXUART2_CTSI2C1_SCLTIMA0_C3UART1_CTSTIMG6_C0TIMA1_C0
PB3INDEX15UART3_RXUART2_RTSI2C1_SDATIMA0_C3NUART1_RTSTIMG6_C1TIMA1_C1
PB4INDEX16UART1_TXUART3_CTSTIMA1_C0TIMA0_C2TIMA1_C0N
PB5INDEX17UART1_RXUART3_RTSTIMA1_C1TIMA0_C2NTIMA1_C1N
PB6INDEX22UART1_TXSPI1_CS0SPI0_CS1TIMG8_C0UART2_CTSTIMG6_C0TIMA1_C0N
PB7INDEX23UART1_RXSPI1_POCISPI0_CS2TIMG8_C1UART2_RTSTIMG6_C1TIMA1_C1N
PB8INDEX24UART1_CTSSPI1_PICOTIMA0_C0COMP1_OUT
PB9INDEX25UART1_RTSSPI1_SCKTIMA0_C1TIMA0_C0N
PB10INDEX26TIMG0_C0TIMG8_C0COMP1_OUTTIMG6_C0
PB11INDEX27TIMG0_C1TIMG8_C1CLK_OUTTIMG6_C1
PB12INDEX28UART3_TXTIMA0_C2TIMA_FAL1TIMA0_C1
PB13INDEX29UART3_RXTIMA0_C3TIMG12_C0TIMA0_C1N
PB14INDEX30SPI1_CS3SPI1_POCISPI0_CS3TIMG12_C1TIMG8_IDXTIMA0_C0
PB15INDEX31UART2_TXSPI1_PICOUART3_CTSTIMG8_C0TIMG7_C0
PB16INDEX32UART2_RXSPI1_SCKUART3_RTSTIMG8_C1TIMG7_C1
PB17INDEX42UART2_TXSPI0_PICOSPI1_CS1TIMA1_C0TIMA0_C2
PB18INDEX43UART2_RXSPI0_SCKSPI1_CS2TIMA1_C1TIMA0_C2N
PB19INDEX44COMP2_OUTSPI0_POCITIMG8_C1UART0_CTSTIMG7_C1
PB20INDEX47SPI0_CS2SPI1_CS0TIMA0_C2TIMG12_C0TIMA_FAL1TIMA0_C1TIMA1_C1N
PB21INDEX48SPI1_POCITIMG8_C0
PB22INDEX49SPI1_PICOTIMG8_C1
PB23INDEX50SPI1_SCKCOMP0_OUTTIMA_FAL0
PB24INDEX51SPI0_CS3SPI0_CS1TIMA0_C3TIMG12_C1TIMA0_C1NTIMA1_C0N
PB25INDEX55UART0_CTSSPI0_CS0TIMA_FAL2
PB26INDEX56UART0_RTSSPI0_CS1TIMA0_C3TIMG6_C0TIMA1_C0
PB27INDEX57COMP2_OUTSPI1_CS1TIMA0_C3NTIMG6_C1TIMA1_C1
******************************************************************************/ #ifndef __LAUNCHPAD_H__ #define __LAUNCHPAD_H__ #include /** * \brief RED1 is a constant to select red LED1 on Port A, PA0 */ #define RED1 1 /** * \brief BLUE is a constant to select blue LED2 on Port B, PB22 */ #define BLUE (1<<22) /** * \brief RED is a constant to select red LED2 on Port B, PB26 */ #define RED (1<<26) /** * \brief GREEN is a constant to select green LED2 on Port B, PB27 */ #define GREEN (1<<27) /** * \brief S1 is a constant to select switch S1 on Port A, PA18 */ #define S1 (1<<18) /** * \brief S2 is a constant to select switch S2 on Port B, PB21 */ #define S2 (1<<21) /** * Initialize LEDs and switches on MSPM0G3507 LaunchPad * - PA0 output RED LED1, negative logic * - PB22 output BLUE LED2, positive logic * - PB26 output RED LED2, positive logic * - PB27 output GREEN LED2,positive logic * - PA18 input S1 switch, positive logic * - PB21 input S2 switch, negative logic * * @param none * @return none * @brief Initialize LaunchPad * @note In most ECE319K example code, this function is called first and will reset and enable power to Port A and Port B * @warning Do not call this twice */ void LaunchPad_Init(void); /** * Read S1, positive logic switch on PA18 * @param none * @return 0 if S1 is not pressed, 0x00040000 if S1 is pressed * @see LaunchPad_Init() * @brief Input S1 */ uint32_t LaunchPad_InS1(void); /** * Read S2, negative logic switch on PA18. The software converts to positive logic. * @param none * @return 0 if S3 is not pressed, 0x00200000 if S2 is pressed * @see LaunchPad_Init() * @brief Input S2 */ uint32_t LaunchPad_InS2(void); /** * Set LED1, negative logic LED on PA0 * - led=0 to PA0=1, turn off LED1 * - led=1 to PA0=0, turn on LED1 * * @param led 1 to turn on, 0 to turn off * @return none * @brief Output to LED1 */ void LaunchPad_LED1(uint32_t led); /** * Turn on LED1. Makes PA0=0 to turn on LED1 * @param none * @return none * @brief Turn on LED1 */ void LaunchPad_LED1on(void); /** * Turn off LED1. Makes PA0=1 to turn off LED * @param none * @return none * @brief Turn off LED1 */ void LaunchPad_LED1off(void); /** * Set LED, 3-color positive logic LED on PB22,PB26,PB27 * - led=0 to turn off LED * - led bit 22 sets blue color * - led bit 26 sets red color * - led bit 27 sets green color * * @param led sets the color of LED * @return none * @brief Output to LED */ void LaunchPad_LED(uint32_t led); /** * Set LED to white. Make PB22=1,PB26=1,PB27=1 to create white * @param none * @return none * @brief Make LED white */ void LaunchPad_LEDwhite(void); /** * Turn off LED. Make PB22=0,PB26=0,PB27=0 to turn off LED * @param none * @return none * @brief Turn off LED */ void LaunchPad_LEDoff(void); /** * \brief The following constants are used to index into the PINCM table */ // Mode2 Mode3 Mode4 Mode5 Mode6 Mode7 Mode8 Mode9 #define PA0INDEX 0 // UART0_TX I2C0_SDA TIMA0_C0 TIMA_FAL1 TIMG8_C1 FCC_IN #define PA1INDEX 1 // UART0_RX I2C0_SCL TIMA0_C1 TIMA_FAL2 TIMG8_IDX TIMG8_C0 #define PA2INDEX 6 // TIMG8_C1 SPI0_CS0 TIMG7_C1 SPI1_CS0 #define PA3INDEX 7 // TIMG8_C0 SPI0_CS1 UART2_CTS TIMA0_C2 COMP1_OUT TIMG7_C0 TIMA0_C1 I2C1_SDA #define PA4INDEX 8 // TIMG8_C1 SPI0_POCI UART2_RTS TIMA0_C3 LFCLK_IN TIMG7_C1 TIMA0_C1N I2C1_SCL #define PA5INDEX 9 // TIMG8_C0 SPI0_PICO TIMA_FAL1 TIMG0_C0 TIMG6_C0 FCC_IN #define PA6INDEX 10 // TTIMG8_C1 SPI0_SCK TIMA_FAL0 TIMG0_C1 HFCLK_IN TIMG6_C1 TIMA0_C2N #define PA7INDEX 13 // COMP0_OUT CLK_OUT TIMG8_C0 TIMA0_C2 TIMG8_IDX TIMG7_C1 TIMA0_C1 #define PA8INDEX 18 // UART1_TX SPI0_CS0 UART0_RTS TIMA0_C0 TIMA1_C0N #define PA9INDEX 19 // UART1_RX SPI0_PICO UART0_CTS TIMA0_C1 RTC_OUT TIMA0_C0N TIMA1_C1N CLK_OUT #define PA10INDEX 20 // UART0_TX SPI0_POCI I2C0_SDA TIMA1_C0 TIMG12_C0 TIMA0_C2 I2C1_SDA CLK_OUT #define PA11INDEX 21 // UART0_RX SPI0_SCK I2C0_SCL TIMA1_C1 COMP0_OUT TIMA0_C2N I2C1_SCL #define PA12INDEX 33 // UART3_CTS SPI0_SCK TIMG0_C0 CAN_TX TIMA0_C3 FCC_IN #define PA13INDEX 34 // UART3_RTS SPI0_POCI UART3_RX TIMG0_C1 CAN_RX TIMA0_C3N #define PA14INDEX 35 // UART0_CTS SPI0_PICO UART3_TX TIMG12_C0 CLK_OUT #define PA15INDEX 36 // UART0_RTS SPI1_CS2 I2C1_SCL TIMA1_C0 TIMG8_IDX TIMA1_C0N TIMA0_C2 #define PA16INDEX 37 // COMP2_OUT SPI1_POCI I2C1_SDA TIMA1_C1 TIMA1_C1N TIMA0_C2N FCC_IN #define PA17INDEX 38 // UART1_TX SPI1_SCK I2C1_SCL TIMA0_C3 TIMG7_C0 TIMA1_C0 #define PA18INDEX 39 // UART1_RX SPI1_PICO I2C1_SDA TIMA0_C3N TIMG7_C1 TIMA1_C1 #define PA19INDEX 40 // SWDIO #define PA20INDEX 41 // SWCLK #define PA21INDEX 45 // UART2_TX TIMG8_C0 UART1_CTS TIMA0_C0 TIMG6_C0 #define PA22INDEX 46 // UART2_RX TIMG8_C1 UART1_RTS TIMA0_C1 CLK_OUT TIMA0_C0N TIMG6_C1 #define PA23INDEX 52 // UART2_TX SPI0_CS3 TIMA0_C3 TIMG0_C0 UART3_CTS TIMG7_C0 TIMG8_C0 #define PA24INDEX 53 // UART2_RX SPI0_CS2 TIMA0_C3N TIMG0_C1 UART3_RTS TIMG7_C1 TIMA1_C1 #define PA25INDEX 54 // UART3_RX SPI1_CS3 TIMG12_C1 TIMA0_C3 TIMA0_C1N #define PA26INDEX 58 // UART3_TX SPI1_CS0 TIMG8_C0 TIMA_FAL0 CAN_TX TIMG7_C0 #define PA27INDEX 59 // RTC_OUT SPI1_CS1 TIMG8_C1 TIMA_FAL2 CAN_RX TIMG7_C1 #define PA28INDEX 2 // UART0_TX I2C0_SDA TIMA0_C3 TIMA_FAL0 TIMG7_C0 TIMA1_C0 #define PA29INDEX 3 // I2C1_SCL UART2_RTS TIMG8_C0 TIMG6_C0 #define PA30INDEX 4 // I2C1_SDA UART2_CTS TIMG8_C1 TIMG6_C1 #define PA31INDEX 5 // UART0_RX I2C0_SCL TIMA0_C3N TIMG12_C1 CLK_OUT TIMG7_C1 TIMA1_C1 #define PB0INDEX 11 // UART0_TX SPI1_CS2 TIMA1_C0 TIMA0_C2 #define PB1INDEX 12 // UART0_RX SPI1_CS3 TIMA1_C1 TIMA0_C2N #define PB2INDEX 14 // UART3_TX UART2_CTS I2C1_SCL TIMA0_C3 UART1_CTS TIMG6_C0 TIMA1_C0 #define PB3INDEX 15 // UART3_RX UART2_RTS I2C1_SDA TIMA0_C3N UART1_RTS TIMG6_C1 TIMA1_C1 #define PB4INDEX 16 // UART1_TX UART3_CTS TIMA1_C0 TIMA0_C2 TIMA1_C0N #define PB5INDEX 17 // UART1_RX UART3_RTS TIMA1_C1 TIMA0_C2N TIMA1_C1N #define PB6INDEX 22 // UART1_TX SPI1_CS0 SPI0_CS1 TIMG8_C0 UART2_CTS TIMG6_C0 TIMA1_C0N #define PB7INDEX 23 // UART1_RX SPI1_POCI SPI0_CS2 TIMG8_C1 UART2_RTS TIMG6_C1 TIMA1_C1N #define PB8INDEX 24 // UART1_CTS SPI1_PICO TIMA0_C0 COMP1_OUT #define PB9INDEX 25 // UART1_RTS SPI1_SCK TIMA0_C1 TIMA0_C0N #define PB10INDEX 26 // TIMG0_C0 TIMG8_C0 COMP1_OUT TIMG6_C0 #define PB11INDEX 27 // TIMG0_C1 TIMG8_C1 CLK_OUT TIMG6_C1 #define PB12INDEX 28 // UART3_TX TIMA0_C2 TIMA_FAL1 TIMA0_C1 #define PB13INDEX 29 // UART3_RX TIMA0_C3 TIMG12_C0 TIMA0_C1N #define PB14INDEX 30 // SPI1_CS3 SPI1_POCI SPI0_CS3 TIMG12_C1 TIMG8_IDX TIMA0_C0 #define PB15INDEX 31 // UART2_TX SPI1_PICO UART3_CTS TIMG8_C0 TIMG7_C0 #define PB16INDEX 32 // UART2_RX SPI1_SCK UART3_RTS TIMG8_C1 TIMG7_C1 #define PB17INDEX 42 // UART2_TX SPI0_PICO SPI1_CS1 TIMA1_C0 TIMA0_C2 #define PB18INDEX 43 // UART2_RX SPI0_SCK SPI1_CS2 TIMA1_C1 TIMA0_C2N #define PB19INDEX 44 // COMP2_OUT SPI0_POCI TIMG8_C1 UART0_CTS TIMG7_C1 #define PB20INDEX 47 // SPI0_CS2 SPI1_CS0 TIMA0_C2 TIMG12_C0 TIMA_FAL1 TIMA0_C1 TIMA1_C1N #define PB21INDEX 48 // SPI1_POCI TIMG8_C0 #define PB22INDEX 49 // SPI1_PICO TIMG8_C1 #define PB23INDEX 50 // SPI1_SCK COMP0_OUT TIMA_FAL0 #define PB24INDEX 51 // SPI0_CS3 SPI0_CS1 TIMA0_C3 TIMG12_C1 TIMA0_C1N TIMA1_C0N #define PB25INDEX 55 // UART0_CTS SPI0_CS0 TIMA_FAL2 #define PB26INDEX 56 // UART0_RTS SPI0_CS1 TIMA0_C3 TIMG6_C0 TIMA1_C0 #define PB27INDEX 57 // COMP2_OUT SPI1_CS1 TIMA0_C3N TIMG6_C1 TIMA1_C1 #endif // __LAUNCHPAD_H__ /** @}*/